Department of Electrical and Computer Engineering
231 Light Engineering
Stony Brook University
Stony Brook, NY 11794-2350
Peter Milder's research combines aspects of hardware design, FPGAs, compilers, and CAD, and focuses on applications in machine learning, DSP, and networking.
He has created and maintained the Spiral DFT/FFT IP Core Generator, an online tool to generate flexible hardware implementations of the discrete Fourier transform suitable for implementation as ASIC or FPGA.