Peter Milder

Peter Milder
Associate Professor, Electrical and Computer Engineering

Department of Electrical and Computer Engineering
231 Light Engineering
Stony Brook University
Stony Brook, NY 11794-2350

(631) 632-8407
peter.milder [at]


Automatic hardware generation and optimization tools; Domain-specific languages for hardware; Field-programmable gate arrays (FPGAs); Hardware for signal processing, communication systems, computer vision, and other areas


Peter Milder  is an Associate Professor of Electrical and Computer Engineering at Stony Brook University.


Peter Milder's research combines aspects of hardware design, FPGAs, compilers, and CAD, and focuses on applications in machine learning, DSP, and networking.

He has created and maintained the Spiral DFT/FFT IP Core Generator, an online tool to generate flexible hardware implementations of the discrete Fourier transform suitable for implementation as ASIC or FPGA.